1. Field of the Invention
The present invention relates to the fabrication of filters used in digital phase-locked loops (PLLs), and, more particularly, with relation to the application of such a phase-locked loop in a carrier recovery system of a modem coupled to a telephone line.
2. Discussion of the Related Art
The book "Digital Communication" by E. A. Lee and D. G. Messerschmitt, Kluwer Academic Publishers, fourth edition, 1992 describes phase-locked loops and their application to modems. More particularly, the operation of such phase-locked loops are described in chapter 14 of this book entitled "Carrier Recovery", pp. 548-557. Drawings 14-2 and 14-6 are duplicated in FIGS. 1 and 2.
As assumed in chapter 14, in application of phase-locked loops according to the present invention, the sampling clock, or symbol or baud clock, is assumed to have a known frequency. The phase-locked loop is designed to accurately recover the carrier frequency by taking into account only frequency shifts and phase jitters.
To achieve this purpose, the input circuits of a modem determine, at each sampling clock pulse, a complex signal from the analog signal received on the telephone line. If the transmission is free of defect, the complex signal corresponds to an emitted symbol. As represented in FIG. 1, this complex signal is applied to the input of a phase detector 1 and more particularly to a first input of a multiplier 2. The output of multiplier 2 is provided to the first input of an angle measurement device 3 and to the input of a decision circuit 4. The second input of the angle measurement device 3 is provided by the output of the decision circuit 4, which approximates, from stored tables, the phase and the amplitude of the symbol presenting the closest characteristics with respect to the received symbol. The angle measurement device determines the difference or the angle error .epsilon..sub.k between the received symbol and the approximated symbol and uses this difference to lock a complex oscillator or VCO 5 providing a complex signal that will be used to "demodulate" the input signal in the multiplier 2. A loop filter 6 is provided between the angle error measurement device 3 and the input of the complex VCO 5. The difference between this device and a conventional phase-locked loop lies in that the reference signal is an estimation provided by the decision circuit 4 instead of being externally provided.
FIG. 14-6 of the above-mentioned book, duplicated in the attached FIG. 2, is an exemplary implementation of the circuit of FIG. 1. This circuit, in which conventional mathematic notations designate real and imaginary parts, will not be described in detail. It should only be noted that in the lower right-hand portion of the figure, an exemplary suitable filter is represented. In this case, the filter is of the integral type including a multiplier for multiplying the error signal by a constant K.sub.L. At each clock pulse, the multiplier output is added to the content of a register z.sup.-1. So, at the output of the register a cumulated error, which corresponds to an error integration, is obtained.
A problem encountered with filters that are used in this particular application and more generally with PLL filters is that, during initialization, for example during the initial training or handshake procedure between two modems, one must rapidly compensate for an error that may be important. In contrast, once the initial correction has been carried out, for example while a modem is communicating, the phase no longer varies significantly. So, it is desired, during the initial phase, to use a relatively high coefficient K.sub.L to ensure fast control; then, once the communication is established, to decrease coefficient K.sub.L (and more generally the filtering coefficients K) to carry out small corrections and to ignore high instantaneous variations normally corresponding to non-repetitive parasitic pulses.
So, digital PLLs, in which the filtering coefficients are switched between a high initial value and a lower steady state value, have already been provided in the prior art.
However, this rather abrupt switching of the filtering coefficients K, that substantially correspond to the time constant of an analog filter, can cause loops to be locked off. This is a particular problem in modem applications where other adaptive algorithms operate in parallel in a convergent way.